【作者】 王婷；

【导师】 吴宁；

【作者基本信息】 南京航空航天大学 ， 电路与系统， 2010， 硕士

【摘要】 随着集成电路制造工艺技术的进步,片上系统SoC在设计过程中遇到了难以解决的问题,如通信能力难以满足系统需求、全局时钟难以同步等问题,制约了单一芯片上集成的IP核的规模和数量。片上网络NoC采用基于包交换的通信方式和全局异步局部同步技术,将从体系结构上解决片上系统设计遇到的问题。对于片上网络路由算法的研究是片上网络研究领域中的一个重要分支。论文研究保证QoS并且适用于片上网络的动态路径分配算法,使之能够根据全局网络状态的变化调整路由路径,以解决网络拥塞和故障链路的问题。论文首先分析了QoS的性能指标,在此基础上设计了一组适用于片上网络路径分配算法的性能约束条件。针对设计的性能约束条件,提出了一种面向特定应用的动态路径分配算法。其次,在C语言环境设计实现了路径分配算法和片上网络模型,基于该模型对算法进行功能验证和仿真,分析不同通信任务模型下网络负载的分布情况,初步评估算法的性能。然后,在RTL级采用Verilog语言设计实现了路径分配算法,将设计的算法与课题组的RTL级片上网络模型连接,进行功能验证。在功能验证无误的基础上,仿真算法在不同网络状态和不同网络负载下的QoS性能指标,并与XY维序路由和DyXY路由算法对比分析算法的性能。最后,在Synopsys的EDA平台对算法进行综合,分析面积和功耗开销。通过对比分析RTL级仿真获得的平均传输延时、网络吞吐量、链路利用率等QoS性能指标,结果表明论文提出的动态路径分配算法在不同的网络状态下均获得了较优的性能,有效地平衡了网络负载,从而降低了数据包阻塞率,改善了网络中有链路拥塞和故障状态下的性能。更多还原

【Abstract】 As technology scales down, the design of System-on-Chip encounters some difficult problems: the communication ability can not satisfy the need of system, the overall synchronous clock system is difficult to design, et al. Those problems restrict the scale of IP cores integrated on a sigle chip. Network on chip which based on GALS and packet switching could solve the problems SoC design encounted. Research on routing algorithm is an important branch of NoC research. This article focuses on the research of dynamic routing algorithm for NoC with Quality-of-Service gruarantees, so that it could adjust routing path according to the change of global network states to resolve the problem of network with congestion and failed links.Frist, we analyze QoS requirements and design a group of performance constraints for NoC routing algorithm. On this basis, we propose a dynamic routing algorithm for specific application. In order to evaluate the performance of the routing algorithm, we design NoC model and the routing algorithm with C language.Then, we simulate the routing algorithm in different communication tasks model to evaluate the distribution of network load. After that, we design the routing algorithm with Verilog HDL, and connect it with NoC system model of our group to evaluate the design. On this basis, we simulate the routing algorithm in different network status and network load to acquire QoS metrics. Then we compare them with XY routing and DyXY routing to analyze the performance of the algorithm. Finally, we synthesize the algorithm on EDA platform of Synopsys to analyze area and power cost.By comparing and analyzing the QoS metrics we obtained from RTL-level simulation, the results indicate that the routing algorithm proposed in this paper could balance the network load effectively. Thereby, packet congestion probability is reduced and the performance of the network with congestion and failed links is improved.更多还原