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相参信号数字接收机的硬件实现

Research on Coherent Pulse Train Digital Receiver on Hardware

【作者】 李伟

【导师】 刘渝;

【作者基本信息】 南京航空航天大学 , 通信与信息系统, 2010, 硕士

【摘要】 本文介绍了相参信号数字接收机各个模块的基本算法,其中包括正交变换、信号检测、信号识别、相参信号频率估计,详细讨论了相参线性调频信号频率估计算法,并以基于ADSP TS201S和FPGA(XC5VSX95T)的硬件平台来实现相参信号数字接收机,采用了一系列的优化方法,提高了系统信号处理的实时性。相参信号频率估计算法一种利用相参信息实现高精度频率估计的算法,先估计单脉冲的频率,然后以多个单脉冲频率估计值的均值作为参考频率,将相参脉冲串下变频至基带,在脉内对基带信号求和可得到一个正弦波信号。该正弦波的频率为原信号频率与参考频率之差,时间为脉冲串的持续时间,信噪比提高了N倍,N为脉内信号样本数,因此可获得此正弦波信号频率的高精度估计。利用该频率对参考频率进行修正就能获得原信号频率的高精度估计。本文着重研究了相参线性调频信号频率估计算法,提出了一种对齐起始点的算法。该算法利用线性调频信号的特点,即起始点估计的误差会导致起始频率的偏差。调频斜率为正(负)则以起始频率最大(小)的脉冲作为基准,对其他脉冲的起始点进行修正,即对齐脉冲串的起始点。另外,由于相参信号频率估计对脉冲串的累加相位连续性要求比较高,而在实际应用场合,由于外界环境的多变性及复杂性,各个脉冲的累加相位的线性性往往不是很好,经常会出现抖动(拐点位置),即在某些段线性性很好,但整体的线性性却遭到了一定程度的破坏。针对上述情况,本文提出了一种加权平均分段线性拟合方法很好的解决了这一问题。本文还讨论了相参信号数字接收机的软硬件实现,给出了具体的实现方法和实现步骤,在软件编程方面,给出了较好的编程规范和程序优化方法。对存储器配置时,合理的利用总线,减少总线冲突;将同时去用的数据放在不同的存储区域,提高总线利用率。最后DSP的运行结果表明相参脉冲频率估计精度满足了工程的要求,优化结果显著,达到了准实时的要求。

【Abstract】 The article presents an introduction of algorithm for every module of coherent signal digital receiver, including IQ conversion, signal detecting, signal identifying, and coherent signal frequence estimation. The algorithm of coherent pulse train frequence estimation is discussed in detail, furthermore a series of optimization methods are used to improve the efficiency of hardware system based on ADSP TS201 and FPGA XC5VSX95T.The algorithm of coherent pulse train frequence estimation is a high accurate frequency estimation method with coherency. The frequencies of all monopulse signals were estimated respectively, and the mean value of these estimates was considered as a reference frequency to down-conversion the coherent pulse train. All of the baseband signals were accumulated in intrapulse and a sinusoidal signal was acquired, of which the frequency is the difference between the carrier and the reference frequencies, the duration is the pulse train duration and the signal-to-noise ratio(SNR) is N times that of the SNRin. Accordingly, it is possible to get high accurate frequency estimate of the sinusoid. Then the frequency of coherent pulse train was obtained by the reference frequency plus the difference.An algorithm about unifying TOA (time of arrival) of pulse was addressed for the coherent linear frequency modulation signal which is discussed in detail in the paper. According to the character of the LFM, namely, the frequency estimated error is proportional to the TOA estimated error, so we can modify the TOA of other pulses based on maximal (minimum) frequency if the FM slope is positive(negateve).And then we can estimate the Doppler frequency offset between the first half and the second half of the whole coherent pulse train. The paper has demonstrated the operation of concrete steps, and the simulation exam has already proved that the algorithm’s validity, Moveover, as the coherent pulse train frequence estimation algorithm needs coherent plus phase of each pulse, however the environment is changing and complicated, the coherence of the pulse train is not good enough, usually there are some inflexions, that is between the next two inflexions the coherence of this part is well enough, while the coherence of the whole pulse train are damaged. The paper has presented a plus coefficient part linear regression on the signal phase which can settle the problem.The paper has also discussed the software and hardware implementation of coherent signal digital receiver, the operation of concrete steps has been demonstrated. While refer to program design, an impressive program criterion and methods on how to increase processing rate is presented. When memory allocating, buser need to be properly assigned to decrease bus conflicts; datas that used at the same time should better put into different memory blocks. After optimization, the result of the operation of this DSP and FPGA system indicated that the work is effective and coincide with the project requirements.

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