【作者】 陈双文；

【导师】 刘章发；

【作者基本信息】 北京交通大学 ， 微电子与固体电子学， 2011， 硕士

【摘要】 本文使用二阶单环单bit量化结构设计了一个10bit超低功耗的Delta-Sigma调制器,功耗在150uW以内。论文首先从时域分析了Delta-Sigma调制器的基本原理,然后分析了Delta-Sigma调制器频域的传递函数,建立了频域的模型,并使用Simulink完成了建模仿真。根据建模仿真结果和设计要求,选定了设计的总体结构,即二阶单环单bit量化结构。在此结构的基础上提出超低功耗的方案,依据此方案重点进行了差分电路、积分电路、电压比较器电路、基准源电路和锁存器电路的低功耗设计,并对各电路进行仿真和分析。最后搭建了系统的整体电路,并完成了仿真。仿真结果显示这种低功耗组合的电路完全能够实现10bit的精度,信噪比达到80dB以上,无杂散动态范围能够达到90dB以上,而功耗仅有139uW。更多还原

【Abstract】 This paper discusses ultra-low power consumption 10bit second order 1-bit quantization loop Delta-sigma AD (analog-to-digital) modulator. The power consumption is controlled in 150uW.Firstly, the working principle of Delta-sigma AD modulator in time domain is illuminated in this paper, then the transfer function in frequency domain is analsized, the frequency domain mode is set up, the modeling simulation is carried out by using Simulink tool.Secondly, the circuit structure, second order 1-bit quantization loop, is selected in this paper, the ultra-low power plan is presented, the components, operational amplifier, integrator, voltage comparator, reference and latch circuits, are designed and simulated.Finally, the system-level circuit is proposed and simulated, the simulation results demonstrate that this low consumption can achieve 10bit accuracy, more than 80dB SNR, more than 90dB spurious free dynamic range performance. At the same time, the power consumption is only 139uW.更多还原