【作者】 王文华；

【导师】 任建岳；

【作者基本信息】 中国科学院研究生院（长春光学精密机械与物理研究所） ， 光学工程， 2010， 博士

【摘要】 我国幅员辽阔,地理环境复杂,能够及时准确地获取广大地域的地质地貌以及农林渔牧的概况详情对经济发展起着极为重要的作用,发展大视场宽覆盖的遥感相机势在必行。作为前期工程性研究,成像均匀性问题直接影响着图像质量和主观判图效果,因此对大视场遥感相机的研制具有一定的指导意义。本论文就如何保证宽幅图像的成像质量展开探讨,从整个相机的各个研制环节到遥感图像的均匀化处理,提取与成像均匀性有关的工程要素,研究过程体现了“一致性设计是基础,硬件实时校正是保障”的设计思想,在FPGA上实现了成像、校正、自检等控制功能的一体化设计。论文主要内容包括以下几个方面:1.介绍了CCD器件的结构和工作原理,分析了CCD偏置电压、驱动时序相位延时等几个影响CCD成像响应特性的因素,简要说明了TDICCD的推扫成像原理,通过介绍CCD遥感相机成像系统的各个组成部分,总结出影响多通道成像均匀性的几个关键环节。2.设计一致性是大视场遥感相机多通道CCD成像均匀性的基本前提,首先从系统硬件设计的角度,对成像系统主要环节的一致性设计进行了详细探讨,包括CCD焦平面前端驱动电路的一致性设计、分布式电源一致性设计、成像系统时钟同步设计等方面。尤其在驱动时序主备模块切换问题上,着重介绍了反熔丝FPGA芯片对驱动时序延时的影响,一步一步对一次性烧写芯片的延时特性进行了详细分析,指出了环境温度、工作电压以及引脚排列规则对主备切换性能的影响规律。指出硬件标识FPGA身份号是硬件设计一致性的重要前提。然后从FPGA软件设计的角度,对CCD时序延时一致性进行了细致分析,包含了内部时钟网络设计、同步复位与异步复位的优化、FPGA上电同时启动等设计细节。最后探讨如何在行频满足像速匹配要求的前提下,提高行频的调节精度,以尽可能减少CCD传函在行频匹配上的损失。3.经过硬件设计的努力,成像系统中仍残留的非均匀性必须通过校正才能改善。首先介绍了两点非均匀性校正算法,确立了校正因子的数据结构,通过MATLAB仿真校正过程,取得了很好的图像校正效果。针对FPGA的硬件并行计算优势,定义了校正数据的定点乘法,并分析了最终计算误差,在均匀辐照度下,实时校正取得了均匀的图像。然后探讨了如何在遥感相机上实现CCD成像非均匀性的实时校正,以提高遥感信息获取的实时性。论文研究了FPGA内部存储校正因子的合理方案、退化校正因子的再注入、星上定标与校正成像之间的切换、视频AD饱和等实际工程问题,并在实验室对动态目标的推扫成像实时校正试验中取得了非常理想的效果。4.论文对成像系统中的关键模块提取出可量化的物理参数,设计出适合遥感相机应用的自检电路,包括对CCD供电模块的电压状态监测、针对视频AD芯片的模拟自校图形以及数字鉴别率自校图形等设计。对CCD成像过程可能遇到的“过饱和”现象进行了探讨,通过大量的试验和分析,实现了在FPGA采集数字图像的同时,判断“过饱和”并给出标志性自校图形信号的功能。自检电路的设计,为地面联试和在轨工作状态分析提供了有力的参考依据。更多还原

【Abstract】 China stretches across a vast territory with diversiform landscape. It is very important for economic development and national security to obtain detailed landscape of wide area about agriculture, forestry, animal husbandry and fishery in good time. Therefore, it is imperative under the situation to research and develop remote camera with wide-field-of-view (WFOV). As a topic of pre-research, imaging uniformity affects the image quality and subjective distinguishing effect, so that it is significant to the development of remote sensing.This paper focuses on the topic of how to ensure imaging quality from each process of remote camera to subsequent image uniformization. The whole pre-research follows the idea: design is foundation, correction is compensatory. In this paper, many functional module are incorporated on FPGA including imaging, correcting, self-check, etc. The primary coverage of this paper is as follows:First, the structure and principle of CCD detectors are introduced. This paper explains the push-scanning imaging principle through the analysis of detectors’clamp voltage and driving timing phase. From research on each parts of CCD image system, several subsystems which is the potential non-uniformity factor are enumerated for deep research.Second, with a view to hardware design, this paper elaborates on each subsystem’s uniformity, including the CCD analog front-end circuit, distributed power supply, system clock network, etc. Especially, the paper researches intensively the drive-timing first-backup-switch module and excogitates the design techniques such as pins-place rules, operating conditions and supply voltage. Hardware identifying of different FPGA processors is insisted as basic precondition of multi-imaging-unit’s uniformity. Afterward, software design is discussed deeply concerning the uniformity of timing signals which are impressible to CCD imaging. In addition, line-frequency precision of CCD push-scanning is touched upon in this paper.Third, residual non-uniformity after hardware design is settled as remedy of camera imaging uniformity. First of all, we adopt two-point correction arithmetic to establish the structure of correction data matrix, and succeed in simulation in MATLAB for a foregone non-uniform image. Then we utilize the parallel operating advantage of FPGA to define the multiplication and analyze the calculation error. On this condition, this paper achieves the purpose of non-uniformity correction for a image obtained in uniform luminance. After indispensable research of engineering, we carried out an experiment in TDI push-scanning operating mode to test the effect of correction and proved out.Fourth, self-check circuit is necessary for remote camera. This paper provides several solutions which aim at detectors’supply voltage monitor, analog self-check figure for video AD devices and digital distinguishing figure. All designs are implemented with VHDL language programming based FPGA. These figures have been applied and proved out in a CCD imaging system. Besides forenamed self-check means, this paper increases a function of“over-saturation”monitor module to prevent off-work of CCD system in glare luminance.更多还原