【作者】 周浩；

【导师】 安琪；

【作者基本信息】 中国科学技术大学 ， 物理电子学， 2009， 博士

【摘要】 同步辐射光源为当今众多学科基础研究和高技术开发应用研究提供高品质高稳定性的同步光。同步辐射光源中,诊断各种束流参数和改善机器运行性能需要完备的束流测量系统。而束流位置测量系统是加速器诊断中的重要测量系统之一。束流位置测量的对象包括束流轨迹、第一圈位置、平衡轨道、逐圈束流位置以及束流准直。束流测量由信号束流位置探测器(Beam Position Monitor,BPM)完成。前端探测电极与后继信号处理系统两部分构成了信号束流位置探测器。上海光源(Shanghai Synchrotron Radiation facility,SSRF)是一台高性能的中能第三代同步辐射光源,是我国迄今为止最大的大科学装置和大科学平台,在科学界和工业界有着广泛的应用价值。本论文研究课题是“先进加速器全信息束流诊断技术研究”的一个子课题,课题的内容研究探测器信号处理系统的全数字化实现,课题的最终目标是完成数字化束流位置测量系统电子学(数字BPM系统)的样机,应用于上海光源/上海SINAP深紫外FEL装置中的BPM探头信号处理分析。BPM电子学从最初的全模拟信号处理,逐步向数字信号处理过渡。随着模数转换电路与数字信号处理方法的快速发展,近年来BPM电子学出现了全数字化处理的新趋势。本论文正以此为方向,讨论数字化BPM电子学系统所涉及到的各种技术以及设计和实现细节。第一章引言简要介绍束流位置测量的测量对象及性能评价,分析电子存储环束流位置探测器的纽扣性电极的输出信号特点。第二章介绍三种常用的束流位置信号处理方法:△/∑、AM-PM和Log-ratio。它们的共同点是必须对原始信号做归一化处理。差比和(△/∑)处理方法适合高精度闭轨测量,并且以信号幅度(能量)为处理对象,这在通信领域中有成熟的处理方法。本论文中使用差比和(△/∑)处理方法进行束流位置获取。第三章介绍上海光源对数字BPM系统的功能和性能上的要求。数字BPM电子学的研制分两步走,第一步研究难度相对较小的基于欠采样技术的数字BPM系统,第二步再发展到逐束团数字BPM系统上。为此电子学系统划分为三个模块:模拟信号调理模块、ADC模块与数字主板模块。为了工作的延续性,数字主板模块的性能上要兼容两种数字BPM系统。第四章中详细讨论研制第一阶段中三个模块硬件实现的技术路线与细节。模拟信号调理模块部分着重分析射频信号的500MHz中心频率窄带滤波与数字化控制的大动态增益电路实现方法;给出射频电路设计中的电路匹配方式以及级联考虑,以及S参数仿真结果;介绍高频射频电路的PCB板级设计的细节考虑。ADC模块部分重点讨论基于锁相环结构的采样时钟系统对ADC性能的影响;对两种数字BPM系统分别给出采样时钟设计原则;针对采样时钟的关键问题——相位噪声进行细致的分析;ADC模块部分中还讨论了大电流LDO电源的散热设计。数字主板的设计重点是高速数据的接收与缓存。该部分功能实现核心是Virtex4高性能FPGA。结合该FPGA的特点,给出了兼容逐束团数字BPM系统的ADC数据接收逻辑以及存储器接口逻辑的设计,并对存储器接口逻辑进行了完整的时序仿真。同时,对高速存储器接口的信号完整性进行研宄,分别从伪差分电平HSTL与SSTL的匹配选择,信号完整性的IBIS仿真与PCB电磁场仿真,以及地反弹噪声三个方面讨论设计的正确性。第五章介绍欠采样数字BPM系统的数字信号处理核心——数字下变频算法,以及它在FPGA中的实现。算法内容涉及高精度数字数控振荡器(NCO)、级联梳状抽取滤波器(CICDecimator)以及498阶FIR抽取滤波器。实际系统中将计算四路采样数据的IQ结果,八通道117.2799MHz数据被同时降采样处理,因此小面积的实现将是系统的关键。第六章给出已完成的数字BPM系统的测试结果。包括模拟信号调理模块的滤波性能与增益控制性能测试,高速存储器接口的正确性测试,ADC采样时钟分析测试,数字下变频功能测试以及数字BPM系统联调测试。目前测试结果显示,数字BPM系统对信号幅度测量rms噪声水平在-73dB,满足SSRF对束流位置测量的需求。更多还原

【Abstract】 Synchrotron radiation facility is a high quality light source for the need of many scientific researches and technological innovations.Beam diagnosis system,which is used for diagnosing beam parameters and improving running status,is important to synchrotron radiation facility.And beam position diagnosis is a key part to beam diagnosis system.Its measurements cover trajetory, first turn,equilibrium,turn-by-turn,beam based alignment and orbit stability.Beam position diagnosis is performed by Beam Position Monitor(BPM),which consists of two parts:detecting sensor and signal processing system.Shanghai Synchrotron Radiation facility(SSRF) is a third-generation of synchrotron radiation light source and would be the invaluable tools for Chinese scientific research and industry community.This paper research is a subproject of "Research on advanced accelerator beam diagnoses techniques".It deals with fully digital implementation of position sensor signal processing.The goals is developing prototype of digital beam position monitor,which can be used on SSRF and SINAP.There are several generations of BPM,staring with analog signal processing.And digital signal processing took the place of analog processing gradually.In recent years,BPM development has a tendency of full digital implementation.The paper research discusses details of various techniques and implementations for digital beam position monitor.In first chapter the background of BPM was introduced,including kinds of measurement and the transform from beam position to voltage on detecting sensor.The second chapter introduced there most common processing methods for BPM processing:Δ/Σ,AM-PM and Log-ratio.TheΔ/Σis suitable for close-orbit measurement and deals with amplitude of signal.It can use the theories and techniques of communications.It is the method for BPM system of this paper.In the third chapter it was introduced that requirements of BPM system on SSRF.It is planed that two kinds of BPM will be developed.The first one is based on undersample technique which is well-developed in communications.It consists of three parts:analog signal conditioning module, ADC module and digital motherboard.The second one is a bunch by bunch BPM.It is more complicated with analog signal conditioning and A/D conversion.But the two kinds of BPM share a same kind of motherboard.So it needs well-planned when designing the motherboard.The hardware techniques used in undersampling BPM was discussed in the fourth chapter. About the analog signal conditioning module implementation mothed for narrow band pass filter of 500MHz center frequency and digitally controlled variable gain circuit were introduced.The RF circuit matching and cascading methods as well as PCB layout considerations were discussed and several S parameter simulation results were post.The ADC sampling clock was an important part of ADC module.The impact of sampling clock on ADC performance was discussed.The principle of sampling clock design for two kinds of BPM was given.The analysis of phase noise in PLL circuits was also included.Another consideration for ADC module was heat sinking design of LDOs.The motherboard was designed with improved data throughput.Some design thoughts were given about high bandwidth ADC data receiving in bunch by bunch BPM.DDRII SRAM and DDR SDRAM’s interface with FPGA,including PCB layout design and logic design was discussed.How to keep the signal integrity was the main part of this section.Different kinds of simulation were done in design process,including electromagnetic simulation for PCB,IBIS simulation for HSTL signals.Ground bunch analysis was given for FPGA IO design.Digital down converter(DDC) is the key part to DSP of DBPM.The implementation of DDC in FPGA with area consideration was introduced in the fifth chapter.NCO,CIC decimator and 498 order FIR decimator was designed and implanted in FPGA.Modelsim simulation results were given.In the sixth chapter,the test report of debugged part of DBPM was given,including filter and gain control performance of analog signal conditioning module,ADC sampling clock phase noise analysis,DDRII SRAM and DDR SDRAM performance,DDC performance and whole system test.It is reckoned from the system test result that 1um turn-by-turn uncertainty could be achieved, which meets the SSRF demand.更多还原