【作者】 丁艳芳；

【导师】 朱自强；

【作者基本信息】 华东师范大学 ， 无线电物理， 2007， 博士

【摘要】 集成电路从微电子发展到微纳电子时代,SOI技术以其优于体硅的高性能、全集成、低功耗、低成本的诸多优势成为取代现有体硅材料的核心支撑技术。SOI器件虽然因为它独特的埋层结构有很多优于体硅器件的性能,但也同时由于这种埋层结构散热能力较差,导致SOI器件和电路存在自加热效应,并且随着器件尺寸的缩小,电流密度的增加,这种效应对SOI器件性能的影响更是不容忽视;又由于在解决高频混合集成电路中信号串扰的问题,虽然常规的SOI的氧化埋层可以实现有源元件和基片之间的完全隔离,但在更高频率下,埋层氧化物对信号来说又几乎是透明的,因此随着SOI技术在射频电路中的应用日渐重要,解决其信号隔离问题也变得更关键。有鉴于此,探索研究新的SOI结构和材料就成为SOI研究领域新的热点。本论文结合我们承担的国家自然科学基金项目等任务,一方面开展了以AlN为埋层的新型SOI结构、引入WSix埋层的GPSOI新结构等的制备、性能及其应用的研究;另一方面,研究了SOI材料新的应用领域以及相关的SOI器件新工艺。获得的主要新结果如下:(1)采用脉冲准分子激光沉积(PLD)技术在Si衬底上制备了AlN薄膜;为减轻传统SOI器件/电路的自加热效应,采用Smart-cut技术首次成功获得以AIN为埋层的新型SOI材料(即SOAN);采用Medici二维器件模拟以AlN为埋层的SOAN MOSFET在抑制自加热效应方面的所表现的优越性,其结果表明SOAN结构可以有效地抑制自加热效应。(2)采用Smart-cut技术和硅、钨的高温固相反应结合在一起成功制备了SOI结构中高电导率的WSix(1<x<2)埋层,制备出Si/SiO2/WSix/Si结构;研究了GPSOI新结构中WSix埋层的电学特性,发现退火温度的升高有利于提高硅化钨层电导能力和顶层硅的晶体质量,由此确定了射频性能优异的绝缘埋层制备方法;设计了GPSOI材料进行抗串扰性能测试的结构,考察了ADS Momentum软件在模拟其抗串扰能力方面的可行性。(3)采用超高真空电子束蒸发法在全耗尽SOI衬底上成功制备了ZrO2/Al2O3新型纳米层状高κ层结构,深入研究了全耗尽SOI MOS电容的高频C-V特性,结果表明全耗尽SOI MOS电容的高频C-V特性是由少子决定的。(4)制备了六种不同衬底材料上的共平面波导(CPW)传输线,并比较了它们的损耗大小,结果表明:采用SOI衬底结构和地屏蔽技术均能有效地减少传输线的插入损耗。(5)结合微天平(QCM)技术在石英晶体上制作了薄膜形式的ZnO纳米线湿度传感器,同时研究了所制备的传感器对湿度检测的敏感特性,数据的稳定性和重复性;结合SOI结构在传感器领域的应用前景,设计了以SOI结构为基片衬底的新型ZnO纳米线传感器的模型,为下一步的研究工作打下良好的基础。更多还原

【Abstract】 SOI （Silicon-on-insulator） technology is expected to replace bulk silicon technology in microelectronics industry because it possesses many advantages as compared to bulk silicon, such as easier electrical isolation, significant reduction of parasitic capacitances, excellent sub threshold slope, elimination of latch up and resistance to radiation. But it is inevitable that the buried silicon dioxide layer also thermally insulates the MOSFETs （metal-oxide-silicon field-effect transistors） from the bulk due to the low thermal conductivity. So self-heating effects becomes a critic problem for a MOSFETs built-in SOI because it would eventually degrade the device electrical characteristics under prolonged high temperature operation and limit SOI materials in application to high temperature and high power integrate circuit. At the same time, with the improvement of operation frequency and integration of radio frequency circuit, although SOI shows excellent ability of mixed process and devices and compatibility with CMOS process to incorporate digital and analog circuits on one chop, noise impact still is a serious problem. In order to resolve the problems and meet the demand of special device/circuit, there has been a strong interest in the development new SOI structures.So in this project we have made a series of investigations on the Self-heating effect of SOAN（silicon-on-aluminum nitride） device with the buried layer of AlN and the new materials of GPSOI （Ground Plane SOI） with the buried layer of WSix to reducing noise in RFIC. Besides, we have studied the new applications and advanced technologies of SOI materials.The main results acquired are drawn as follows:（1） AlN thin films were fabricated successfully on silicon substrates by pulsed laser deposition and their properties were investigated; a novel SOAN structure were prepared via Smart-cut technology; a two-dimensional numerical analysis was performed by using a device simulator called MEDICI to discuss the influence caused by all kinds of the parameters of SOI device, such as the doping concentration ofsource/drain region, the doping concentration of the channel region, the thickness of the top silicon layer, the thickness of the buried oxide layer; MEDICI also have been used to simulate the electrical characteristics and temperature distribution by comparing with those of bulk and standard SOI MOSFETs, which results suggested that A1N is a suitable alterative to silicon dioxide as a buried dielectric in SOI and expands the applications of SOI to high temperature conditions.（2） Single-crystalline Si/SiO₂/poly-WSix/Sub-Si structure has been successfully fabricated by a new method incorporating standard smart-cut technology and high temperature solid phase reaction between tungsten and silicon; The characteristics of poly-crystalline WSix （1<x<2） layer were studied and we found that increasing annealing temperature could decrease sheet resistance of tungsten silicide and improve the crystal quality of the top silicon layer, but would induce diffusion of tungsten into Si substrate; A structure of GPSOI used in testing was designed in order to investigate the properties of anti-noise in RFICs with the key technology of SOI materials.（3） A two clear nanolaminate layered structure of ZrO₂/Al₂O₃ on ultra-thin SOI substrate via ultrahigh vacuum electron-beam evaporation and post-annealed in N₂ at 450℃ for 30min; The results of its high frequency capacitance voltage （C-V） characteristics of the fully depleted （FD） SOI MOS capacitor showed that the minority carriers determined the high frequency C-V properties and the series resistance of the SOI substrate is the determinant factor of the high frequency characteristics of the FD SOI MOS capacitors.（4） A non-source device with high-performance — CPW transmission lines on different substrates were fabricated and the characterization of their radio wastage were investigated, which showed that the depletion of CPW transmission lines on GPSOI substrate would reduce effectively.（5） ZnO nanotetrapods were synthesized by evaporating highly pure zinc pellets （99.999%） at 900℃ in air and a humidity sensors with ZnO anotetrapods as a sensing element were featured by combination of a quartz crystal as a transducer. The experimental results indicated that ZnO nanotetrapods was a potential humiditysensing material because the response of the sensors had a good sensitivity, frequency stability and reproducibility; A new structure of ZnO anotetrapods humidity sensor on SOI substrate was designed in order to develop the next investigation about SOI sensors.We hope we could develop farther the application of SOI technology and materials through the results of this project.更多还原