节点文献
宽温区叠层热电材料的设计、制作与性能研究
Design, Preparation and Performances of Graded Thermoelectric Materials with Large Temperature Span
【作者】 崔教林;
【导师】 赵新兵;
【作者基本信息】 浙江大学 , 材料学, 2002, 博士
【摘要】 热电材料是一种电能与热能之间实现直接转换的新型能源材料。热电材料的性能与温度有密切联系。不同的热电材料在不同的温度范围内性能达到最佳值,因此,沿温度梯度方向合理地按排不同的热电材料,制成功能梯度或叠层结构材料,可充分利用各种材料的特长,提高热电转换效率。 本项工作主要包括:1)均质热电材料Bi2Te3基、FeSi2基以及膺两元合金(PbTe)1-x(SnTe)x(0≤x≤1)的制备与性能研究,适合于制作梯度功能材料的各种均质热电材料的筛选;2)异种材质及近乎相同材质叠层材料制备工艺的研究以及热应力缓和层的研究);3)采用SEM、EDAX、EMPA、XPS等多种手段,对界面处微观组织结构、扩散与反应的分析;4)采用数学建模计算及实验测量,对两元和多元叠层热电材料的结构设计以及性能和热稳定性的研究。 本项研究获得了以下主要成果: 1、以Sn基合金为焊接材料,采用热浸焊技术制备了Bi2Te3/FeSi2叠层热电材料,并系统地分析研究了叠层热电材料的性能,焊接过渡层的微观组织结构以及过渡层在热加工及模拟服役过程中的破坏机制。发现:1)叠层材料具有明显优于均质材料的热电性能,在490℃温差下,p-型和n-型叠层材料的最大输出功率分别达到37.0和30.0(mW/cm2),是同类型均质β-FeSi2的2.5和3倍;2)在焊接过程和190℃长时间退火处理过程中,焊接过渡层合金和基体半导体(特别是Bi2Te3)之间存在明显的元素相互扩散,从而在过渡层中形成一些低熔点共晶体和脆性化合物,这是导致叠层材料破坏的主要原因;3)焊接过渡层合金与半导体基体之间的润湿性是影响界面层电性能的主要因素。 2、在Bi2Te3/FeSi2叠层材料中首次采用粉末冶金方法制备了Ni缓冲层。这一缓冲层有效地阻碍了过渡层和半导体基体之间的元素扩散,并缓解了由于两种半导体材料之间热膨胀系数差异而产生的热应力,显著提高了叠层Bi2Te3/FeSi2材料的热稳定性。同时实验发现,Ni在半导体基体材料中的扩散对叠层材料热电输出功率没有显著影响。 3、首次采用粉末冶金方法在大成分范围内制备了膺两元合金(PbTe)1-x(SnTe)x(x=0~1),并对其热电性能进行了系统研究。实验发现,采用粉末烧结法制备的(PbTe)1-x(SnTe)x膺两元合金具有较低的热导率,在室温下其热导率只有相同成分单晶 浙江大学博士研究生学位论文材来的 l八一1/3,在 4500C IjJW只有 1/5左右。实验现得(PbTe).6(S6匀0.4膺两元合金在450℃时的热电优值为 Zn。删。04 XIO”’e,接近于单晶合金性能。 4、系统研究了* 元素掺杂对膺两元合金on);入hn人热电性能的影响。发现PbTI合金掺杂200lol pplll的Ag后,电导率在整个温区均有明显增大,尤其在室温附近的热电性能明显提高。随着膺 *ti合金rf SnTe含量和测试温度的上升,Ag掺杂的作用逐渐降低,胸二儿合金的性能逐渐恶化。其原因被认为是由于散射机制的改变、载流子浓度趋于饱和以及Ag作为间隙原一了提供额外施主。因此,通过性能测试及筛选,掺杂 200 molppm Ag含量的三j膺两元合金(PbTe)、(SnTex(os x s 04)可用于设计制作叠层材料。 5、通过对BLTe。/PeS分叠层材料的建模计算和实验验b卜 发现BL*e。/FeSL叠层材料的最佳界面温度约为 190”C,当热端温度为 sls℃,冷端采用水冷却时所对应的 Bi。Te。/Fest。最佳长度比为 1:10。 6、对多元叠层FeSVrest,材料进行建模计算和分析,发现由不同成分铁硅基合金组成的叠层热电材料具有优于81。Te/Fes1。叠层材料的潜在性能。同时,Fes**的。叠层材料还具有热稳定性优越、价廉环保等优点,是一类可用于余热发电的新型叠层热电材料。 7、通过对膺两元合金ObTe);./③ITe人门 x三 1)多层叠层材料的优化设计与性能计算,当冷其端温差约为 440”CI付,Pb几/(PbTe).8(SllTe).2/(PbTe).6(SflTe).4叠层材料的最大输出功率可达 ZI(mw/cm勺,比同类型均质材料提高 25%以上。实验测得这种叠层材料的最大输出功率为旧(m*八十X 与在相同冷热端温度条件下实测的同类型均质材料相比,叠层材料的最大输出功率值可提高19%以上。
【Abstract】 Thermoelectric materials are functional materials which can be used to convert thermal energy into electrical energy or vice versa directly. The properties of thermoelectric materials are closely related to temperature. The best performance of a given thermoelectric material can be obtained only in a very small temperature region. Considering the fact that thermoelectric materials will work in a relative large temperature span when they are used in a thermoelectric generator, only a small section of the thermoelectric materials can work at the corresponding most favorable temperature. However, the performance of thermoelectric materials can be optimized if various materials with different properties are arranged along the temperature axis to form a graded or laminated thermoelectric material.In the present work some homogeneous materials such as Bi2Te3- and FeSi2-based thermoelectric materials as well as pseudo-binary alloys (PbTe)1-x(SnTe)x (0 x 1) have been prepared, their thermoelectric properties have been measured, and the possibilities for constitution of laminated structures have been discussed. The processes for preparation of laminated thermoelectric materials and the thermal stress buffer layers sandwiched between thermoelectric material segments have been studied. The microstructures, diffusion and chemical reactions near the interfaces have been analyzed using SEM, ED AX, EMPA and XPS. The thermoelectric power outputs of laminated structures with various thermoelectric materials have been mathematically optimized and experimentally measured.Some conclusions have been drawn in the present work as follows:1. The performance, microstructures and the failure mechanism of laminated Bi2Te3/FeSi2 prepared by dip coating using tin-based alloys as bridge materials have been investigated. The maximal power outputs of 37.0 mW/cm2 and 30.0 mW/cm2 for the p- and n-type laminated materials respectively at the temperature difference 490 have been experimentally obtained, which are about 2.5 and 3.0 times those of -FeSi2. Chemical analyses show that the interface failure between the bridge alloy and the semiconductor Bi2Te3 results mainly from the eutectic mixtures with low melting point and brittle compounds formed during welding and long time annealing at 190 . It is found that the electrical properties of a laminated structure are mainly controlled by the wettability of the bridge alloy on the semiconductor surface.2. Powder metallurgy was firstly used to prepare the nickel buffer layer sandwiched between Bi2Te3 and FeSi2 semiconductors. It was found that the buffer layers can effectively hinder the diffusion of elements across the interface and release the thermal stress caused by thermal coefficients mismatch. The thermal stability of graded materials, therefore, has been significantly improved. In the meantime, experimentsshowed that the diffusion of nickel into two matrixes does not worsen the performance of the laminated materials.3. Pseudo-binary alloys (PbTe)1-x(SnTe)x (x=0-1) were firstly prepared by pressureless sintering and the thermoelectric properties were experimentally investigated. Very low thermal conductivities of the alloys were observed, which are about l/4~1/3 at the ambient temperature and 1/5 at 450 those of single crystals. The best figure of merit Zmax equal to 0.4 10-3/K has been measured at 450 for (PbTe)0.6(SnTe)0.4, which is close to that of the single crystal.4. The effect of Ag doping on the properties of pseudo-binary alloys (PbTe)1-x(SnTe)x has been investigated. It was found that 200 mol ppm Ag doping in the PbTe alloy can greatly improve the electrical conductivity at the whole temperature range, especially near room temperature. This effect was gradually decreased with the increase of SnTe content in the pseudo-binary alloys as well as the increase of temperature, which is considered to be caused by the change of scattering mechanism, the saturation of carrier concentration as well as the Ag atoms occ
【Key words】 Thermoelectric materials; Laminated materials; Transport properties; FeSi2; Bi2Tc3; (PbTe)1-x(SnTe)x; Optimization; Sintering; Diffusion; Power output; Bridge interface layer;