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面向认知无线电的数字信号处理器体系结构技术研究

Research on Digital Signal Processor Architecture for Cognitive Radio

【作者】 王士显

【导师】 谢伦国;

【作者基本信息】 国防科学技术大学 , 计算机科学与技术, 2013, 博士

【摘要】 计算机和微电子技术的高速发展,促进了通信技术的快速革新。当前广泛使用的无线通信技术在人们的工作和生活中扮演着越来越重要的角色。与此同时,随着人们对于高速多媒体无线通信网络需求的不断增长,使得无线通信对无线电频谱资源需求与当前频谱固定分配策略下频谱利用率低下的矛盾变得越来越突出。认知无线电是一种具有频谱感知和智能决策能力的软件无线电,不仅能够提高无线电频谱资源的利用率,还将进一步提高通信系统的智能水平。认知无线电处理器在软件无线电处理器的需求之上,增加了频谱感知、可重构计算和智能决策等更多的功能和更高的计算性能需求。因此,对面向认知无线电的数字信号处理器体系结构进行深入研究具有十分重要的意义。本文在国家“863”高技术研究发展计划项目和多个国家自然科学基金项目的支持下,对认知无线电的频谱感知算法和体系结构、认知无线电可重构基带处理器体系结构以及自主认知无线电节点体系结构等方面展开了深入的分析研究,主要工作包括:1、基于能量检测的认知无线电频谱盲感知算法和体系结构设计与实现。频谱盲感知对于认知无线电系统实现来说十分重要,为了加速能量检测计算和适应变化的检测精度需求,设计实现了一种具有动态可重构功能的流水线体系结构的FFT处理器,能够重构处理64到2048点的FFT计算,同时保持了良好的功耗和面积开销。提出了两阶段能量检测算法,基于这一算法和可重构FFT处理器设计实现了检测性能可调的能量检测器。2、基于循环平稳特征检测算法的并行实时频谱感知协处理器体系结构设计与实现。循环平稳特征检测广泛应用于窄带信号到达角估计、信号识别以及雷达信号参数估计等领域,但是由于较高的计算复杂度一直限制其作为实时信号处理的工具。提出了一种计算高效的并行循环平稳特征检测算法,并在多核软件无线电处理器了进行了算法映射和实现验证,对于8MHz的32768次采样,频谱感知时间为78.8ms。基于并行循环平稳特征检测算法,设计实现了并行循环平稳特征检测器体系结构。能量检测器具有实现简单的优点,可以作为粗粒度频谱盲感知的手段,基于本文提出的可重构FFT处理器,设计实现了具有能量感知和循环平稳特征检测功能的可重构频谱感知协处理器,实现了频谱感知性能和功耗开销的平衡。3、面向认知无线电的可重构基带处理器体系结构设计与实现。认知无线电可重构基带处理对数字信号处理器提出了新的挑战,提出了认知无线电基带系统模型,分析了以NC-OFDM为传输技术的基带处理计算特征。为了满足认知无线电对动态可重构的功能需求,提出了面向基带处理应用的可重构体系结构模型,设计实现了基于这一模型的可重构多处理器体系结构CORA,实验结果表明,这一体系结构设计能够满足基于NC-OFDM技术的认知无线电基带处理计算需求。4、自主认知无线电概念模型、认知圈和自主认知无线电节点体系结构原型设计实现。为了实现从频谱感知认知无线电到理想认知无线电的演进,研究了自主系统设计原则并证明了理想认知无线电认知圈与自主系统设计原则的一致性,提出了自主认知无线电概念模型和自主认知无线电认知圈,给出了自主认知无线电概念模型相关部件的功能和详细定义。基于自主通信开源平台ACE Toolkit,设计实现了自主认知无线电模拟环境。设计实现了MPSoC结构的自主认知无线电节点体系结构原型ACRA,将IEEE802.22协议规定的认知无线电功能定义映射到ACRA上的实验结果表明ACRA在频谱管理上的合理性以及频谱感知性能上的优势。综上所述,本文针对面向认知无线电的数字信号处理器体系结构技术进行了研究,提出了面向认知无线电的频谱感知协处理器,认知无线电基带处理模型和可重构基带处理器以及自主认知无线电节点体系结构模型和原型实现,对于推动认知无线电的相关研究和体系结构实现具有一定的意义和价值。

【Abstract】 With the rapid development of the computer and micro-electronic technologies, thecommunication technology has been changed a lot. The widely used wirelesscommunication technology becomes more and more important in our daily work andlife. However, with the rapidly increasing requirement for faster multimedia wirelesscommunication, the need for more spectrum resources is controdictory to the fixed andlow untilized spectrum allocation policy all around the world. Cognitive radio can beseen as software-defined radio with the capability of spectrum sensing and intellegentdecision. Although the cognitive radio push more requirement for spectrum sensing andreconfiguration computing beyond the software-defined radio, which is really achallenge to software-defined radio processors. The benefit of cognitive radio is quiteobvious, it not only improve the rate of spectrum utilization but also improves theintelligence of communication systems. Thus the relevant research on the digital signalprocessor architecture for cognitive radio is actually very important. This thesis issupported by the National High Technology Research and Development Plans of China(“863” Plan) and a number ofNationalNature Science FundationofChina (NSFC). Thespectrum sensing algorithm and spectrum sensor architecture, the congitive radioreconfigurable baseband processor and the autonomic cognitive radio node architecturehave been investigated. The main research includes the following topics:1、 Cognitive radio blind spectrum sensing algorithms based on energy detectionand the spectrum detectors architecture based on these algorithms. Blind spectrumsensing is very important for cognitive radio system implementation beacuse we assumethe cognitive radio know nothing about the primary user information. For therequirement of computing for energy detection and changable detection precision, areconfigurable pipeline FFT processor is proposed, the FFT processing points vary from64to2048, the area and power consumption of this FFT processor is fairly low. Thetwo stages energy detection algorithm is proposed. Based on the two stages energydetection algorithm and the reconfigurable FFT processor, a detection performanceadjustable energy detector is designed and implemented.2、 Parallelized cyclostationary feature detection algorithm and the parallelcyclostationary feature detector architecture implementation. Cyclostationary featuredetection has been widely used in multiple narrowband signals difference of arrival(DOA) estimation, weak spread-spectrum communication signal identification, andradar signal parameter estimation. But high computational complexity ofcyclostationary feature detection limits its usage as a signal analysis tool. Acomputational efficient parallel cyclostationary feature detection algorithm is proposedand tested on our multicore software-defined radio processor. For a typical spectrum sensing task with32768samples of8MHz spectrum, the spectrum sensing time is78.8ms. The parallel cyclostationary feature detector architecture based on the abovemetioned parallel detection algorithm is implemented. Combined with energy detector,which is easy to be implemented, a reconfigrable energy and cyclostationary featuredetector is proposed. The detection task of this detector can be devided into two stages,the energy detector for first stage coarse-grained sensing and the cyclostationary featuredetector for second stage fine-grained sensing task. The reconfigurable spectrumdetector achieves a balance in the spectrum sensing performance and powerconsumption overhead.3、 Cognitive radio reconfigurable baseband processor architectrue design andimplementation. Cognitive radio reconfigurable baseband processing is a challegingtask for digital signal processor. A cognitive radio baseband processing model isproposed and the NC-OFDM transimission technology based baseband processingcomputing character is analyzed. Cognitive radio put an emphsis on the dynamicreconfigurable, so the reconfigurable architecture model for the baseband processingrequirement is proposed. CORA (Cognitive radio Oriented Reconfigurable basebandArchitecture), a multicore reconfigurable processor architecture based on the model isdesigned. The numerical results show that this architecture is suited for NC-OFDMbased cognitive radio baseband processing with reconfigurable capability.4、 Autonomic cognitive radio concept model, cognitive cycle and autonomiccognitive radio node architecture prototype design and implementation. In order toachieve the evolution from contemporary spectrum sensing cognitive radio to the idealcognitive radio, the autonomic system design principles are investigated and the idealcognitive radio cycle is proved consistent with this principles. The autonomic cognitiveradio conceptual model and the autonomic cognitive radio cycle are proposed, alongwith the formal definition of its different parts and function. Based on the open-sourceautonomic communication platform, ACE Toolkit, the autonomic cognitive radiosimulation environment is implemented. The autonomic cognitive radio architecturemodel is the key step to system realization. ACRA (Autonomic Cognitive RadioArchitecture), an MPSoC (Multiple Processor System-on-Chip) based architecture forautonomic cognitive radio, is proposed. We mapped the cognitive radio capabilitiesdefined in the IEEE802.22standard onto the ACRA, and experiment results show thefeasibility of spectrum management function in ACRA and its enhanced performance inspectrum sensing.In the summary, this thesis has investigated a number of key technologies for thedigital signal processor architecture for cognitive radio. Spectrums sensing coprocessorarchitectures for cognitive radio, cognitive radio baseband processing model andreconfigurable baseband processor and autonomic cognitive radio node architecture have been proposed. This thesis is expected to accelerate the theoretical andimplemental research on cognitive radio.

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