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LDPC码在衰落信道中的应用研究

Study on Application of Low Density Parity Check Codes over Fading Channel

【作者】 戚英豪

【导师】 戎蒙恬;

【作者基本信息】 上海交通大学 , 通信与信息系统, 2013, 博士

【摘要】 LDPC(低密度校验)码是一种接近Shannon容量限的信道编码,基于图模型的迭代译码具有线性的复杂度,是当今编码领域最受瞩目的研究热点之一。LDPC码如何和通信系统中的其他技术如数据同步和信道均衡等有效结合,实现无同步码或导频传输下的可靠译码,对于提高系统的频谱效率和信道容量有着重要的意义。本文在总结和借鉴前人研究成果基础上,重点探讨了LDPC码在帧同步和SC-FDE系统中的应用,在以下几个方面进行了深入研究:首先对基于硬判决校验约束的LDPC码盲帧同步方案的性能进行了详细分析,已有的研究对FSER(帧同步错误率)的估计依赖于数值仿真或采用粗糙的离散概率密度近似计算,在码字的列重较大时FSER理论值和实际仿真结果有较大偏差,文中提出利用连续概率密度的高斯近似思想,从理论上推导出了FSER的计算公式,其仅依赖于码校验矩阵的行重和列重分布,仿真结果和理论值几乎完全重合。从理论上第一次证明了:在码率、码长和校验矩阵的行重相同时,列重不等的不规则LDPC码帧同步性能优于规则LDPC码;在总长度相等的情形下,多帧短码的帧同步性能要优于单帧长码;盲帧同步的错误平层仅依赖于码的校验矩阵的维数(行数和列数),随着码长增加而几乎不存在错误平层。现有的帧同步算法没有充分利用QC-LDPC码的准循环特点,文中提出一种利用码结构的快速算法,显著降低运算的复杂度,可同时适用于基于硬判决和软判决校验约束的帧同步。其次研究了基于软判决校验约束的LDPC码帧同步方案,利用联合概率密度函数最大化改进了Sun算法,并指出其等价于Imad提出的简化MAP(最大后验概率)算法,针对Imad简化算法,提出了利用加权校正在几乎不增加复杂度的情形下,可以在高SNR时改善帧同步效果。Imad给出的同步性能估计依赖于数值仿真和校验子近似独立的假设,且在码字的列重较大时估计值和实际仿真结果有较大偏差,文中提出利用高斯近似思想,从理论上推导出了最小和译码时基于校验约束的FSER计算公式,理论值和仿真值在低SNR下十分接近,而在高SNR下理论值成为一个较紧的仿真值的估计上界,并把估计推广到一般的卷积码和任意衰落信道。利用FSER估计的理论值,推导出了基于门限的帧同步算法的合适门限值和混合帧同步算法的性能估计,可以进一步降低帧同步算法在实用中的复杂度。针对基于译码的帧同步算法,提出把译码和互相关运算结合,在一次迭代时可以显著改善帧同步性能。针对相位偏转下的帧同步,提出了一种基于距离平方和最小的相位检测方案,并可以和基于二阶统计信息的相位检测器结合排除不正确的相位模糊度,指出利用编码帧同步方案可以同时消除BPSK传输中存在的π相位模糊和实现盲帧同步。最后研究了LDPC码在SC-FDE系统中的应用,指出在传统的解决方案中采用丢弃CP(循环前缀)的频域处理没有充分利用CP在时域上的重复特点,针对无ISI(码间干扰)传输的系统,提出利用CP实现部分信号分集接收,既可以增加系统容量,又可以降低误码率,并且补偿了由于插入CP引起的SNR损失,仿真表明在衰落信道下分集接收的译码获得的增益比AWGN信道更为显著。针对ISI传输的系统,提出把CP作为扩展的校验矩阵的一部分参与译码,经过适当变换的扩展校验矩阵可以优化变量节点的度分布和改善Tanner图上短圈的分布以利于译码,仿真表明在频率选择性信道下采用BCJR的TDE迭代均衡比线性FDE均衡的性能要好,插入CP引起的SNR损失也得到补偿。针对脉冲噪声下的编码SC-FDE系统,给出了采用EGC(等增益合并)的分集接收和LLR(对数似然比)直接相加的接收方案,仿真表明前者无法改善脉冲噪声引起的性能恶化,而后者可以取得和无CP系统一样的性能。

【Abstract】 Low density parity check code (LDPC) is a kind of capacity approaching codes.It has linear complexity of iterative decoding based on graph models and arouses muchinterest in the coding community. Study on combining LDPC codes with other tech-nologies such as synchronization and equalization is important for raising spectrumefficiency and channel capacity of the system. Based on the previous related researchachievements, the dissertation will focus on application of LDPC codes in frame syn-chronization and SC-FDE system.First, we present detailed analysis of blind synchronization performance of LD-PC coded system based on hard constraints. Previous estimation relied on numericalsimulation and used coarse model based on discrete pdf computation. It is far awayfrom the simulation results for codes having large column weight. We deduce the the-oretical value of FSER by using gaussian approximation of continuous pdf. We showthat FSER only depends on the row and column weight distribution of the code. Simu-lation results verify the good prediction of the theoretical estimation. We proved that:irregular LDPC codes have better synchronization performance than regular codeswith the same rate, length and row weight; synchronization based on multiple shortframes is better than that based on one long frame;the error floor only depends on thedimensions of the parity check matrix and almost disappears with longer code. Pre-vious frame synchronization methods did not utilize the inner structure of QC-LDPCcodes, while we propose a fast algorithm which is efficient in reducing computationalcomplexity and it is suitable for both hard and soft synchronizers.Second, we present detailed analysis of blind synchronization performance ofLDPC coded system based on soft constraints. We prove that the improved Sun algo-rithm is equal to the simplified MAP algorithm proposed by Imad. We use the weight method to improve the Imad simplified algorithm at high SNR region without increas-ing any complexity. The estimation of FSER proposed by Imad is based on numericalsimulation and independence of the syndromes. It is far away from the simulation re-sults for codes having large column weight. We deduce the theoretical value of FSERby using gaussian approximation of continuous pdf for minimum decoding. It is closeto the simulation results at low SNR region and becomes a tight upper bound at highSNR region. It can be easily applied to the case of convolutional codes and fadingchannels. We use the theoretical FSER to compute the suitable thresold for thresholdbased synchronizer and estimate the FSER of hybrid synchronizer. Both of the twomethods can decrease the complexity of synchronization. We combine decoding withcorrelation to improve the synchronizer based on decoding. It shows much better per-formance for one iterative decoding. We propose a phase estimator based on minimumsquare distance which can be combined with the phase estimator based on high orderstatics. The method can eliminate uncorrect phase ambiguity. The π phased ambiguitycan be eliminated together with blind frame synchronization for some codes.Last, we applied LPDC codes in SC-FDE system. In contrast to the tractional re-moval of CP (Cyclic prefix) in frequency domain processing, we show that CP can becombined in non ISI (Inter symbol interference) channel to achieve more capacity andlower error rate and the SNR loss can also be compensated. Simulation results showthat more coding gain is achieved over fading channel than AWGN channel. For ISIchannels, we treat CP as part of the expanded parity check matrix which is transformedto improve the degree distribution of variable nodes and the cycle distribution of theTanner graph. Simulation result shows that TDE (Time domain equalizer) based onBCJR algorithm has better performance than linear FDE (Frequency domain equal-izer) over frequency selective channels. We propose two methods combining CP overimpulsive channels. One method uses EGC (Equal gain combining) and the otheruses LLR (Log likelihood addition). Simulations shows that the former method cannot improve the degrading by impulsive noise, while the latter one can achieve theperformance as well as the system with no CP.

【关键词】 LDPC帧同步循环前缀均衡
【Key words】 LDPCframe synchronizationcyclic prefixequaliza-tion
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