【作者】 赵博；

【导师】 汪蕙；

【作者基本信息】 清华大学 ， 电子科学与技术， 2011， 博士

【摘要】 随着无线传感网技术的飞速发展，对节点单芯片片上系统的需求越来越迫切，而射频电路的设计是节点芯片设计的瓶颈。本论文研究了适用于无线传感网的射频收发机中的一些关键技术，完成了以下工作，并全部进行了流片验证：针对适用于无线传感网的收发机的低开销、灵活、低功耗和易开发等要求，设计了系统方案并进行指标规划。针对无线传感网收发机低开销、灵活和镜像抑制的要求，提出一种低噪声、大动态范围、带镜像抑制的射频接收前端方案，并给出了有源RC复数滤波器的设计流程，提出一种数控电容阵列的实现方法用于有源RC电路的时间常数调谐。同时，提出一种低开销的本振信号产生方法，通过一个1.72GHz～1.74GHz的锁相环和一个四分频器的组合，来实现430MHz～435MHz的频率输出，为低中频的接收机提供两路正交的本振信号；为四分频器建立杂散模型，并在此基础上设计了一个低杂散、低噪声、低功耗的四分频器，以改善接收机的邻信道选择性。针对无线传感网收发机低功耗、低开销的要求，提出了一种10.6mW功耗、18～25μs建立时间的锁相环频率综合器。采用键合线作为压控振荡器的电感，降低了功耗和芯片面积，同时也降低了相位噪声，这有助于改善接收机的邻信道选择性。提出一种快速自动频率校正机制，来校正键合线电感造成的谐振频率偏差，并提出基于电阻的静电释放保护电路，来增大频率校正范围。还提出了一种动态环路带宽机制，以满足时分复用的半双工无线传感网系统的需求，并建立模型来预测锁相环在不同带宽下噪声的分布。此外，为支持高斯频移键控的频率综合器的数字部分提供了一套可测试性设计，并为预分频器提出一种多级功耗缩放技术进一步降低了频率综合器的功耗。针对无线传感网收发机的低功耗和灵活的要求，提出了一种5dB最小输入信噪比、5.9mW功耗、55.4dB动态范围的全模拟中频电路方案。其中限幅放大器和信号幅度指示器采用折叠结构的放大器单元与电流减法器结构的整流器单元的组合，能有效的抑制工艺偏差的影响。同时，考虑到整流器的非线性和静态电流，我们提出一种精确的信号幅度指示器传输函数的逼近模型，并提供了基于这种逼近模型的信号幅度指示器设计流程。此外，提出一套基于有源RC结构的高斯频移键控解调方案，具有低功耗、大动态范围的优点。更多还原

【Abstract】 With the rapid development of the technologies in the field of wireless sensor net-works, the requirements for system on chip are becoming more and more urgent, and theradio-frequency part is the bottleneck to design a node chip. This dissertation investi-gates the key technologies of radio-frequency transceivers for wireless sensor networks,and the following works are completed and taped out:To meet the requirements on low cost, flexibility, low power, and easy developmentof transceivers for wireless sensor networks, we design a system architecture, and makean assignment of the specifications.To meet the requirements on low cost, flexibility, and image rejection of transceiversfor wireless sensor networks, we propose a low-noise large-dynamic-range radio-frequency receiving front end with image rejection, and give the design flow of active-RCcomplex filters. Meanwhile, we propose an implementation method of digital-controlledcapacitor arrays that can be used for the tuning of active-RC circuits. In addition, we pro-pose a method for low-cost generation of local oscillation, which is composed of a1.72GHz～1.74GHz phase-locked loop and a÷4divider. Then, the desired430MHz～435MHz output signals can be obtained, and the low-intermediate-frequency receiver can besupplied with both in-phase and quadrature-phase local oscillating signals. After that webuild a model for the÷4divider, and design a low-spur, low-noise and low-power÷4divider based on the model, and then the adjacent channel selectivity of the receiver canbe improved.To meet the requirements on low cost and low power of transceivers for wirelesssensor networks, we propose a10.6mW phase-locked loop frequency synthesizer with18～25μs settling time. Bond wires are adopted as the inductors of the voltage-controlledoscillator, and then the power consumption, the die area and the phase noise are all de-creased. Therefore, the adjacent channel selectivity can be improved. A scheme of fastautomatic frequency calibration is proposed to calibrate the frequency deviations inducedby the bond-wire inductors, and a resistor based electro-static discharge protection circuitis proposed to enlarge the calibration range. Additionally, a dynamic-bandwidth schemeis also proposed to meet the requirements of time-division half-duplex wireless sensor networks, and an analytical model is built to forecast the noise distribution under difer-ent bandwidths of a phase-locked loop. Furthermore, we build a design-for-testabilityscheme for the frequency synthesizer with gauss frequency shift keying, and propose amulti-stage power-scaling technology for the prescaler to further reduce the power con-sumption of the frequency synthesizer.To meet the requirements on low power and flexibility of transceivers for wirelesssensor networks, we propose an all-analog intermediate-frequency circuit with5dB min-imum input signal-to-noise ratio,5.9mW power, and a55.4dB dynamic range. The lim-iting amplifier and received signal strength indicator is composed of folded amplifiers,folded subtractors, and current subtractor based rectifiers, and then the process deviationscan be depressed efectively. Taking into account the nonlinearity and static current ofthe rectifiers, we propose an accurate approximation model of the received signal strengthindicator’s transfer function, and provide a design flow of received signal strength indica-tors assisted by the proposed model. In addition, we proposed an active-RC demodulationscheme for gauss frequency shift keying, and the scheme has the advantages of low powerand a large dynamic range.更多还原