【作者】 江亮；

【导师】 毛军发；

【作者基本信息】 上海交通大学 ， 电磁场与微波技术， 2011， 博士

【摘要】 随着摩尔定律不断地推动着集成电路工艺向前进步,芯片的特征尺寸越来越小,工作频率越来越高,金属互连线所占的面积越来越大,传统的金属互连线遭遇到了性能的极限问题,如互连线的延时、压降、串扰、功耗等问题将制约集成电路的进一步发展。因此,研究并设计一系列缓解或解决互连线极限问题的互连新技术势在必行。天线是无线通信系统中一个不可缺少的重要组成部分。近几年来,人们开始研究将天线技术应用于芯片互连线的领域,采用无线通信系统的分析与设计方法,用天线及无线通信方式取代传统的金属互连线,实现芯片内部或者芯片之间某些功能模块的互连,从而在一定程度上缓解金属互连线的极限问题,此即无线互连技术。同时,也有研究采用少量传统微波传输线(微带线或共面波导)作为传输介质,用无线通信中的各种调制解调方式,通过耦合电容上传与下传多路信号,从而减小传统金属线所占的面积,部分缓解传统金属线发展的一些极限问题,此即射频互连技术。本学位论文在总结前人研究的基础上,构建了射频互连系统的信道模型及噪声模型,分析了该模型的信号传输特性及噪声特性,以及综合使用各种调制方式实现带宽-信噪比的一个较好的均衡。同时,主要针对片上天线的小型化,高增益,低损耗,定向性等问题展开了研究,设计了各种适用于无线互连系统的天线。将电磁带隙(EBG),高阻表面(HIS)等技术应用于片上天线的设计,并实现了一款单频片间无线互连收发系统,从而验证了该天线的性能优越性及无线互连系统实现的可行性。具体内容阐述如下:1、构建并分析了射频互连系统的信道及噪声模型,包括信道的信号传输特性,噪声特性,包括端口反射噪声、开关耦合噪声和接收机热噪声等。根据所得到的信道信噪比特性,为了在带宽及误码率之间实现一个较好的均衡,在不同信噪比条件下综合使用CDMA及MPSK等分段调制方式,提高了整个射频互连系统的整体性能。2、为了提高无线互连系统的互连性能,设计了一系列小型化,高增益,低损耗,高方向性的片上天线。采用标准0.18um CMOS工艺设计实现片上缝隙天线,证明了在严格的工艺规则限制下,设计实现这些片上天线完全可行。采用低电阻率( 10Ω?cm)的硅衬底设计实现片上缝隙天线,结果表明该缝隙天线比传统的偶极子天线具有更高的片间传输增益。同时采用该工艺设计实现的片上折合振子天线,在减小天线所占面积的同时一定程度上提高了天线的增益。本文还设计仿真了一对片上锯齿形定向天线,通过前后传输增益的比较,证明该天线具有较好的定向性,从而降低了其后向辐射,减小了对天线后向电路的影响。3、为了进一步提高片上天线的传输增益,降低标准CMOS工艺中低电阻率硅衬底对天线增益性能的影响,本文将HIS结构应用到片上天线的设计中,利用HIS结构中的人工磁导体特性,增大了片上偶极子天线的同向电流,从而提高了片上偶极子天线的辐射增益,降低了低损耗硅衬底的损耗。同时,通过HIS加载片上MIM电容,进一步减小了HIS模块的面积,从而节省了天线所占芯片面积。本文还采用EBG结构调谐天线的输入阻抗,在大大减小片上偶极子天线尺寸的同时还抑制了高次谐波。4、采用TSMC0.18um工艺,设计了简单的单频无线互连收发系统,该系统工作在20GHz。本设计发射机包括压控振荡器(VCO),E类功率放大器(class E PA),加载MIM电容的HIS结构实现的片上天线。接收机包括加载MIM电容的HIS结构实现的片上天线,带输出缓冲级的低噪声放大器(LNA)。通过测试结果的验证,证明该系统完全可行,同时验证了采用加载MIM电容的HIS结构实现的片上天线性能的优越性。更多还原

【Abstract】 The application of VLSI and ULSI pushes the development of IC, the progress of which has been predicted by the Moore’s law. However, the scaling down characteristic size, increasing operating frequency, and scaling up metal interconnects area of IC lead to the development limitation of traditional metal interconnects. For instance, the RC delay, IR voltage drop, CV2 fpower loss and crosstalk of metal interconnect will be the bottleneck of IC development. So, the research and design of new interconnect technology solving the limitation problem of interconnects is increasingly necessary.Antennas have been an indispensable and important part of the wireless communication system. In recent years, some research moves the traditional antennas to the field of chip interconnects. The methods of researching and analyzing wireless communication system are adopted, using on-chip antennas and wireless communication ways instead of traditional metal interconnects. By this way, interconnecting between two function modules or two chips could be realized, and some limitation problems of traditional metal interconnects could be solved to a certain extent. This kind of interconnect is called wireless interconnect. Meanwhile, some research focuses on adopting a few or only one traditional microwave transmission lines (MTL (Microwave Transmission Line) or CPW (Coplanar Waveguide)) as the transmission medium, using kinds of modulation and demodulation modes of wireless communication, uploading and downloading signals via coupling capacitors. By this way, the area of traditional metal interconnects could be decreased greatly, and some limitation problems of traditional metal lines partly solved. This kind of interconnect is called RF interconnect.Based on prevenient research, this paper proposes a signal channel model and noise model of RF interconnect, analyzes its signal transmission and noise characteristics, equalizes the band-signal noise ratio well by using all kinds of modulation modes synthetically. Meanwhile, aiming at the miniaturation, higher gain, low loss, and good directional property of on-chip antennas, several kinds of on-chip antennas applicable in wireless interconnect system are designed. Then, EBG (Electromagnetic Bandgap) and HIS (High Impedance Surface)technologies are used in the design of on-chip antennas and a set of inter-chip wireless interconnect transceiver with on-chip antennas are designed and fabricated. The performance of on-chip antenna and the feasibility of wireless interconnect system are validated. The thesis mainly consists of following research work:1. A channel and noise model of RF interconnect system is constructed and analyzed. The model includes the signal transmission performance of channel, noise characteristics including reflecting noise at ports, switching coupling noise and receiver noise etc. Based on the SNR (Signal Noise Ratio) performance, in order to realize a good balance between bandwidth and SNR, CDMA (Code Division Multiple Access) and MPSK (Multiple Phase Shift Keying) modulation modes are used in this model synthetically and then the performance of whole system is improved.2. In order to improve the performance of wireless interconnect system, a series of miniaturized, higher gain, lower loss, higher directional on-chip antennas are designed and realized. We adopt standard 0.18um CMOS technology to design and fabricate on-chip slot antenna, which proves that it is feasible to design and realize these on-chip antennas under the restriction of standard CMOS rules. The low resistivity silicon substrate ( 10Ω?cm) is used to design on-chip slot antennas. The simulation results show that on-chip slot antennas have higher intra-chip transmission gain than normal on-chip dipole under the same condition. Meanwhile, the same CMOS technology is used to design and realize on-chip folded antennas, which minimize the area of antennas while improve the gain of antennas. Two pair on-chip hackle directional antennas are designed and simulated. Compared with the two pair of antennas, good directional characteristics are obtained and thus the back-end radiation is decreased, reducing the bad impact to the circuits.3. In order to improve the transmission gain and reduce the impact of standard CMOS low resistivity silicon substrate of on-chip antennas, HIS structure is used in our designs. As the application of artificial magnetic conductor (AMC) of HIS structure, the mirror current direction of on-chip dipole is the same as the dipole’s and reduce the substrate loss. At the same time, the application of loaded MIM (Metal Insulator Metal) capacitor on HIS decreases the area of HIS farther and saves the chip area. Meanwhile, EBG structure is also applied in our design to tune the input impedance of on-chip antenna, which greatly decreases the on-chip dipole size and restrains the high-order harmonics.4. By TSMC 0.18um technology, an inter-chip wireless interconnect transceiver operating on single frequency is designed and realized. This system operates on 20GHz. The transmitter includes VCO (voltage control oscillator), class E power amplifier (PA) and on-chip dipole with loaded MIM capacitor HIS. The receiver includes on-chip dipole with loaded MIM capacitor HIS and LNA (low noise amplifier) with output buffer. Measured results show that this system works well and prove the good performance of on-chip dipole with loaded MIM capacitor HIS.更多还原