【摘要】 空间辐射环境中的锁相环在SET作用下,将产生频率或相位偏差,甚至导致振荡中止,造成通信或功能中断。压控振荡器是锁相环中的关键电路,也是对SET最为敏感的部件之一。本文基于工艺校准的器件模型,采用TCAD混合模拟的方法,针对180nm体硅CMOS工艺下高频锁相环中的压控振荡器,研究了偏置条件、入射粒子的能量以及温度对压控振荡器SET响应的影响,通过分析失效机理,以指导抗辐照压控振荡器的设计。研究结果表明,当器件工作在截止区时,入射粒子引起压控振荡器输出时钟的最大相位差最小;压控振荡器的输出时钟错误脉冲数随着入射粒子LET的增加而线性增加;随着器件工作温度的升高,轰击粒子引起压控振荡器输出时钟的最大相位差也是增大的。更多还原

【Abstract】 Based on process calibration,single event transient in Voltage-Controlled Oscillators of high frequency Phase-Locked Loops in a 0.18μm bulk process is studied by the TCAD Mixed-mode simulation.The impact of voltage,LET and temperature on SET are studied.Our simulation results demonstrate that the max phase difference caused by the particles on VCO is weak when NMOS works in the cut-off region.The pulse error number caused by the particles on VCO increases linearly as LET increases,and when the device temperature increases,the max phase difference on VCO also generally increases.更多还原