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CMOS锁相环中快速鉴相鉴频器的设计
Design of Fast Phase/Frequency Detector for the CMOS Phase-Locked Loops
【摘要】 为了实现高速锁相环电路,通过分析经典以CMOS锁相环的鉴相鉴频器,针对其延迟时间过长的问题,设计了可用于CMOS锁相环中的快速鉴相鉴频器。整个电路采用了0.13μm CMOS工艺,通过HSpice仿真软件测试表明,该快速鉴相鉴频器与经典鉴相鉴频器相比,延迟时间可以缩短一半。
【Abstract】 To implement high speed phase-locked loops circuit,on the basis of analyzing the conventional phase/frequency detector of CMOS phase-locked loops,a fast phase/frequency detector is designed for the CMOS phase-locked loops to reduce the delay time.The circuit is designed by using the 0.13μm CMOS process and HSpice simulating results show that the designed fast phase/frequency detector can reduce half delay time.
- 【文献出处】 延边大学学报(自然科学版) ,Journal of Yanbian University(Natural Science Edition) , 编辑部邮箱 ,2011年04期
- 【分类号】TN911.8
- 【被引频次】1
- 【下载频次】94