【摘要】 基于0.18μm CMOS工艺设计了一种用于WBAN 402～405 MHz频段具有低功耗全数字锁频和灵敏度校准功能的超再生收发机。采用具有噪声抵消技术的巴伦低噪声放大器，以减少无源匹配器件数量和适应低压工作；超再生数控振荡器采用数字控制电容阵列实现频率调谐，以消除猝灭操作期间振荡器的频率漂移；采用全数字锁频环替代频率综合器，以降低传感器节点的功耗；灵敏度校准环路与自动幅度控制环路共享组件，以减小校准误差，并能够在不中断接收状态的情况下动态校准接收机灵敏度。仿真结果表明，在1 V电源电压下，接收机灵敏度为-90 dBm,功耗为1.89 mW,其中全数字锁频环功耗为78μW;发射机功耗为1.96 mW,效率为28%。更多还原

【Abstract】 A super-regenerative transceiver with low power all-digital frequency locking and sensitivity calibration for the WBAN 402-405 MHz band was designed in a 0.18 μm CMOS process. A Balun low noise amplifier(Balun-LNA) with the noise-canceling technique was used to reduce the number of passive matching components and adapt to low voltage operation. The frequency tuning of the super-regenerative digital-control oscillator(SR-DCO) was realized by using digitally controlled capacitor arrays, which could eliminate the frequency drift of the oscillator during the quenching operation. The all-digital frequency-locked loop(ADFLL) replaced the frequency synthesizer to reduce the power consumption of the sensor node. The sensitivity calibration loop(SCL) shared components with the automatic amplitude control loop(AACL) to minimize errors, and could dynamically calibrate the receiver sensitivity without interrupting receive conditions. The simulation results show that the receiver sensitivity is-90 dBm, and the power consumption is 1.89 mW under the 1 V power supply voltage, in which the power consumption of the ADFLL is 78 μW. The power consumption of the transmitter is 1.96 mW, and the efficiency is 28%.更多还原